nand: denali: issue with 4.13

Discussion:

Oleksij Rempel

2017-09-21 06:44:06 UTC

Hi Masahiro,

you are probably the expert of denali nand driver.
With kernel v4.13 i have following issue, it works on FPGASoC
5CSEBA5U... but is now working on FPGASoC 5CSXFC6C6U... both of them
have same NAND chip, and seems to have similar IP core.

FPGASoC 5CSXFC6C6U...:
====================================================================
[ 0.095899] console [ttyS0] disabled
[ 0.095941] ffc02000.serial0: ttyS0 at MMIO 0xffc02000 (irq = 38,
base_baud = 6250000) is a 16550A
[ 0.702041] console [ttyS0] enabled
[ 0.706986] brd: module loaded
[ 0.716232] loop: module loaded
[ 0.720074] nand: device found, Manufacturer ID: 0x00, Chip ID: 0x2c
[ 0.726404] nand: Unknown denali-nand
[ 0.730077] nand: bus width 8 instead of 16 bits
[ 0.734673] nand: No NAND device found
[ 0.738465] denali-nand-dt: probe of ff900000.nand failed with error
-22
[ 0.745458] cadence-qspi ff705000.spi: n25q256a (32768 Kbytes)

FPGASoC 5CSEBA5U... :
====================================================================
[ 0.711498] console [ttyS0] enabled
[ 0.716657] brd: module loaded
[ 0.726372] loop: module loaded
[ 0.732726] nand: device found, Manufacturer ID: 0x2c, Chip ID: 0x38
[ 0.739059] nand: Micron MT29F8G08ABABAWP
[ 0.743233] nand: 1024 MiB, SLC, erase size: 512 KiB, page size:
4096, OOB size: 224
[ 0.753583] Bad block table found at page 262016, version 0x05
[ 0.761743] Bad block table found at page 261888, version 0x05
[ 0.769900] nand_read_bbt: bad block at 0x000000000000
[ 0.775045] nand_read_bbt: bad block at 0x000000080000
[ 0.780185] nand_read_bbt: bad block at 0x000000100000
[ 0.785301] nand_read_bbt: bad block at 0x000000180000
[ 0.790706] 1 ofpart partitions found on MTD device denali-nand
[ 0.796602] Creating 1 MTD partitions on "denali-nand":
[ 0.801827] 0x000000000000-0x000040000000 : "root"
[ 0.808657] cadence-qspi ff705000.spi: n25q256a (32768 Kbytes)
[ 0.814704] 13 ofpart partitions found on MTD device ff705000.spi.0
[ 0.820966] Creating 13 MTD partitions on "ff705000.spi.0":
[ 0.826521] 0x000000000000-0x000000010000 : "prebootloader0"
[ 0.832580] 0x000000010000-0x000000020000 : "prebootloader1"
[ 0.838567] 0x000000020000-0x000000030000 : "prebootloader2"
[ 0.844602] 0x000000030000-0x000000040000 : "prebootloader3"
[ 0.850638] 0x000000040000-0x0000000c0000 : "barebox0"
[ 0.856085] 0x0000000c0000-0x000000140000 : "barebox1"
[ 0.861532] 0x000000140000-0x000000150000 : "barebox_env"
[ 0.867215] 0x000000150000-0x000000170000 : "barebox_state"
[ 0.873127] 0x000000170000-0x000000190000 : "barebox_fallback"
[ 0.879240] 0x000000190000-0x000000f90000 : "fallback_sys"
[ 0.885044] 0x000000f90000-0x000001010000 : "io_rbf0"
[ 0.890470] 0x000001010000-0x000001090000 : "io_rbf1"
[ 0.895811] 0x000001090000-0x000002000000 : "data"
[ 0.901254] libphy: Fixed MDIO Bus: probed
[ 0.905808] CAN device driver interface

Initially both of SoCs worked with this patch:
commit 9a10df06caeecf39ceb32193c41a3b42c4b7cac3
Author: Graham Moore <***@altera.com>
Date: Mon Oct 28 11:01:37 2013 -0500

FogBugz #163905: Support Denali NAND driver on socfpga platform

At least part of this patch is upstreamed. Are there any other pending,
WIP patches on the way? Any of them covering this issue?

Thank you for work!
Kind regards,
Oleksij

Masahiro Yamada

2017-09-21 11:00:34 UTC

Permalink

Hi.

Post by Oleksij Rempel
Hi Masahiro,
you are probably the expert of denali nand driver.
With kernel v4.13 i have following issue, it works on FPGASoC 5CSEBA5U...
but is now working on FPGASoC 5CSXFC6C6U... both of them have same NAND
chip, and seems to have similar IP core.
====================================================================
[ 0.095899] console [ttyS0] disabled
[ 0.095941] ffc02000.serial0: ttyS0 at MMIO 0xffc02000 (irq = 38,
base_baud = 6250000) is a 16550A
[ 0.702041] console [ttyS0] enabled
[ 0.706986] brd: module loaded
[ 0.716232] loop: module loaded
[ 0.720074] nand: device found, Manufacturer ID: 0x00, Chip ID: 0x2c

This line is strange. It failed to read Manufacturer ID.
The 0x2c should be Manufacturer ID, not Chip ID.

I am guessing we need to wait a bit
after the NAND_CMD_READID.

Please try the following ugly patch.

diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c
index bcc8cef1..2443e3d 100644
--- a/drivers/mtd/nand/nand_base.c
+++ b/drivers/mtd/nand/nand_base.c
@@ -744,10 +744,11 @@ static void nand_command(struct mtd_info *mtd,
unsigned int command,
case NAND_CMD_ERASE2:
case NAND_CMD_SEQIN:
case NAND_CMD_STATUS:
- case NAND_CMD_READID:
case NAND_CMD_SET_FEATURES:
return;
-
+ case NAND_CMD_READID:
+ udelay(5);
+ return;
case NAND_CMD_RESET:
if (chip->dev_ready)
break;
@@ -874,10 +875,11 @@ static void nand_command_lp(struct mtd_info
*mtd, unsigned int command,
case NAND_CMD_ERASE2:
case NAND_CMD_SEQIN:
case NAND_CMD_STATUS:
- case NAND_CMD_READID:
case NAND_CMD_SET_FEATURES:
return;
-
+ case NAND_CMD_READID:
+ udelay(5);
+ return;
case NAND_CMD_RNDIN:
nand_ccs_delay(chip);
return;

--
Best Regards
Masahiro Yamada

Oleksij Rempel

2017-09-22 07:34:56 UTC

Permalink

Hi,

Post by Masahiro Yamada
Hi.

Suddenly this patch makes no difference.
the initial patch was describing an issue with interrupts:
============================================================================
FogBugz #163905: Support Denali NAND driver on socfpga platform

This patch addresses a few bugs and features in the Denali NAND
driver on the socfpga platform.

First the bugs:

- Reading ONFI parameters would cause a timeout, because
the code sent the wrong commands to the controller/device. That was
fixed, and in the process, code was added to wait for the appropriate interrupt.
============================================================================

Post by Masahiro Yamada
diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c
index bcc8cef1..2443e3d 100644
--- a/drivers/mtd/nand/nand_base.c
+++ b/drivers/mtd/nand/nand_base.c
@@ -744,10 +744,11 @@ static void nand_command(struct mtd_info *mtd,
unsigned int command,
return;
-
+ udelay(5);
+ return;
if (chip->dev_ready)
break;
@@ -874,10 +875,11 @@ static void nand_command_lp(struct mtd_info
*mtd, unsigned int command,
return;
-
+ udelay(5);
+ return;
nand_ccs_delay(chip);
return;
--
Best Regards
Masahiro Yamada

Masahiro Yamada

2017-09-23 17:46:23 UTC

Permalink

Post by Oleksij Rempel
Hi,

Post by Masahiro Yamada
Hi.

Suddenly this patch makes no difference.

Does the following make difference?

@@ -3876,6 +3876,8 @@ static int nand_detect(struct nand_chip *chip,
struct nand_flash_dev *type)
/* Select the device */
chip->select_chip(mtd, 0);

+ udelay(1);
+
/* Send the command for reading device ID */
chip->cmdfunc(mtd, NAND_CMD_READID, 0x00, -1);

Post by Oleksij Rempel
============================================================================
FogBugz #163905: Support Denali NAND driver on socfpga platform
This patch addresses a few bugs and features in the Denali NAND
driver on the socfpga platform.
- Reading ONFI parameters would cause a timeout, because
the code sent the wrong commands to the controller/device. That was
fixed, and in the process, code was added to wait for the appropriate interrupt.
============================================================================

I see nothing about time-out error in the log you sent.

I do not know what Altera guys did
in their local repositories.

The Denali NAND on SOCFPGA never worked
(even on _any_ SoCs)
with the mainline kernel before my re-work,
so "git bisect" is useless here.

--
Best Regards
Masahiro Yamada

Oleksij Rempel

2017-09-25 10:22:16 UTC

Permalink

Hi,

Post by Masahiro Yamada

Post by Oleksij Rempel
Hi,

Post by Masahiro Yamada
Hi.

Suddenly this patch makes no difference.

Does the following make difference?
@@ -3876,6 +3876,8 @@ static int nand_detect(struct nand_chip *chip,
struct nand_flash_dev *type)
/* Select the device */
chip->select_chip(mtd, 0);
+ udelay(1);
+
/* Send the command for reading device ID */
chip->cmdfunc(mtd, NAND_CMD_READID, 0x00, -1);

No, no difference.

Right now i noticed that NAND controller on not working setup is
configured to different frequency as NAND on working board.
It will take some time until we test it, if setting different freq will
have any difference.

Oleksij Rempel

2017-09-26 09:36:40 UTC

Permalink

Hi,

Post by Masahiro Yamada

Post by Oleksij Rempel
Hi,

Post by Masahiro Yamada
Hi.

Suddenly this patch makes no difference.

Does the following make difference?
@@ -3876,6 +3876,8 @@ static int nand_detect(struct nand_chip *chip,
struct nand_flash_dev *type)
/* Select the device */
chip->select_chip(mtd, 0);
+ udelay(1);
+
/* Send the command for reading device ID */
chip->cmdfunc(mtd, NAND_CMD_READID, 0x00, -1);

We did more tests, so now i can confirm that issue was caused but not
properly configured clock for NAND controller.
After fixing the configuration provided with altera handoff files for
bootloader, the NAND on Altera 5CSXFC6C6U seems to work properly with
mainline kernel v4.13.

Masahiro Yamada, thank you for work and time! :)

Regards,
Oleksij