[PATCH 2/4] mtd: spi-nor: Add support for is25lp016d

Discussion:

Fabrizio Castro

2018-11-01 12:35:03 UTC

The is25lp016d is found on the iwg23s from iWave, therefore
add driver support for it so that we can upstream board support.

Signed-off-by: Fabrizio Castro <***@bp.renesas.com>
---
drivers/mtd/spi-nor/spi-nor.c | 2 ++
1 file changed, 2 insertions(+)

diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c
index 9407ca5..85d869b 100644
--- a/drivers/mtd/spi-nor/spi-nor.c
+++ b/drivers/mtd/spi-nor/spi-nor.c
@@ -1352,6 +1352,8 @@ static const struct flash_info spi_nor_ids[] = {
{ "is25cd512", INFO(0x7f9d20, 0, 32 * 1024, 2, SECT_4K) },
{ "is25lq040b", INFO(0x9d4013, 0, 64 * 1024, 8,
SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
+ { "is25lp016d", INFO(0x9d6015, 0, 64 * 1024, 32,
+ SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
{ "is25lp080d", INFO(0x9d6014, 0, 64 * 1024, 16,
SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
{ "is25lp128", INFO(0x9d6018, 0, 64 * 1024, 256,

--
2.7.4

Fabrizio Castro

2018-11-01 12:35:02 UTC

Permalink

Add r8a77470 to the list of examples with soctypes.
No driver change is needed as "renesas,qspi" will activate
the right code within the corresponding driver.

Signed-off-by: Fabrizio Castro <***@bp.renesas.com>

---

As per Mark Brown's comment on patch "dt-bindings: spi: rspi: Add
r8a7744 to the compatible list", this patch doesn't come with the
"dt-bindings" prefix in the title.

Documentation/devicetree/bindings/spi/spi-rspi.txt | 1 +
1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/spi/spi-rspi.txt b/Documentation/devicetree/bindings/spi/spi-rspi.txt
index fc97ad6..421722b 100644
--- a/Documentation/devicetree/bindings/spi/spi-rspi.txt
+++ b/Documentation/devicetree/bindings/spi/spi-rspi.txt
@@ -15,6 +15,7 @@ Required properties:
- "renesas,qspi-r8a7743" (RZ/G1M)
- "renesas,qspi-r8a7744" (RZ/G1N)
- "renesas,qspi-r8a7745" (RZ/G1E)
+ - "renesas,qspi-r8a77470" (RZ/G1C)
- "renesas,qspi-r8a7790" (R-Car H2)
- "renesas,qspi-r8a7791" (R-Car M2-W)
- "renesas,qspi-r8a7792" (R-Car V2H)

--
2.7.4

Simon Horman

2018-11-06 14:09:05 UTC

Permalink

Post by Fabrizio Castro
Add r8a77470 to the list of examples with soctypes.
No driver change is needed as "renesas,qspi" will activate
the right code within the corresponding driver.
---
As per Mark Brown's comment on patch "dt-bindings: spi: rspi: Add
r8a7744 to the compatible list", this patch doesn't come with the
"dt-bindings" prefix in the title.
Documentation/devicetree/bindings/spi/spi-rspi.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/spi/spi-rspi.txt b/Documentation/devicetree/bindings/spi/spi-rspi.txt
index fc97ad6..421722b 100644
--- a/Documentation/devicetree/bindings/spi/spi-rspi.txt
+++ b/Documentation/devicetree/bindings/spi/spi-rspi.txt
- "renesas,qspi-r8a7743" (RZ/G1M)
- "renesas,qspi-r8a7744" (RZ/G1N)
- "renesas,qspi-r8a7745" (RZ/G1E)
+ - "renesas,qspi-r8a77470" (RZ/G1C)
- "renesas,qspi-r8a7790" (R-Car H2)
- "renesas,qspi-r8a7791" (R-Car M2-W)
- "renesas,qspi-r8a7792" (R-Car V2H)
--
2.7.4

Fabrizio Castro

2018-11-01 12:35:05 UTC

Permalink

This commit adds QSPI flash support to the iwg23s board specific
device tree.

Signed-off-by: Fabrizio Castro <***@bp.renesas.com>
---
arch/arm/boot/dts/r8a77470-iwg23s-sbc.dts | 26 ++++++++++++++++++++++++++
1 file changed, 26 insertions(+)

diff --git a/arch/arm/boot/dts/r8a77470-iwg23s-sbc.dts b/arch/arm/boot/dts/r8a77470-iwg23s-sbc.dts
index 18d2263..5245a1e 100644
--- a/arch/arm/boot/dts/r8a77470-iwg23s-sbc.dts
+++ b/arch/arm/boot/dts/r8a77470-iwg23s-sbc.dts
@@ -88,6 +88,11 @@
power-source = <1800>;
};

+ qspi0_pins: qspi0 {
+ groups = "qspi0_ctrl", "qspi0_data2";
+ function = "qspi0";
+ };
+
scif1_pins: scif1 {
groups = "scif1_data_b";
function = "scif1";
@@ -106,6 +111,27 @@
};
};

+&qspi0 {
+ pinctrl-0 = <&qspi0_pins>;
+ pinctrl-names = "default";
+
+ status = "okay";
+
+ /* WARNING - This device contains the bootloader. Handle with care. */
+ flash: ***@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "issi,is25lp016d", "jedec,spi-nor";
+ reg = <0>;
+ spi-max-frequency = <133000000>;
+ spi-tx-bus-width = <1>;
+ spi-rx-bus-width = <1>;
+ m25p,fast-read;
+ spi-cpol;
+ spi-cpha;
+ };
+};
+
&rwdt {
timeout-sec = <60>;
status = "okay";

--
2.7.4

Fabrizio Castro

2018-11-01 12:35:04 UTC

Permalink

Add QSPI[01] support to the RZ/G1C SoC specific device tree.

Signed-off-by: Fabrizio Castro <***@bp.renesas.com>
---
arch/arm/boot/dts/r8a77470.dtsi | 34 ++++++++++++++++++++++++++++++++++
1 file changed, 34 insertions(+)

diff --git a/arch/arm/boot/dts/r8a77470.dtsi b/arch/arm/boot/dts/r8a77470.dtsi
index e6407e5..04a8877 100644
--- a/arch/arm/boot/dts/r8a77470.dtsi
+++ b/arch/arm/boot/dts/r8a77470.dtsi
@@ -20,6 +20,8 @@
i2c2 = &i2c2;
i2c3 = &i2c3;
i2c4 = &i2c4;
+ spi0 = &qspi0;
+ spi1 = &qspi1;
};

cpus {
@@ -460,6 +462,38 @@
status = "disabled";
};

+ qspi0: ***@e6b10000 {
+ compatible = "renesas,qspi-r8a77470", "renesas,qspi";
+ reg = <0 0xe6b10000 0 0x2c>;
+ interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 918>;
+ dmas = <&dmac0 0x17>, <&dmac0 0x18>,
+ <&dmac1 0x17>, <&dmac1 0x18>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
+ num-cs = <1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ resets = <&cpg 918>;
+ status = "disabled";
+ };
+
+ qspi1: ***@ee200000 {
+ compatible = "renesas,qspi-r8a77470", "renesas,qspi";
+ reg = <0 0xee200000 0 0x2c>;
+ interrupts = <GIC_SPI 239 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 917>;
+ dmas = <&dmac0 0xd1>, <&dmac0 0xd2>,
+ <&dmac1 0xd1>, <&dmac1 0xd2>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
+ num-cs = <1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ resets = <&cpg 917>;
+ status = "disabled";
+ };
+
scif0: ***@e6e60000 {
compatible = "renesas,scif-r8a77470",
"renesas,rcar-gen2-scif", "renesas,scif";

--
2.7.4

Simon Horman

2018-11-02 11:49:50 UTC

Permalink

Post by Fabrizio Castro
Add QSPI[01] support to the RZ/G1C SoC specific device tree.
---
arch/arm/boot/dts/r8a77470.dtsi | 34 ++++++++++++++++++++++++++++++++++
1 file changed, 34 insertions(+)
diff --git a/arch/arm/boot/dts/r8a77470.dtsi b/arch/arm/boot/dts/r8a77470.dtsi
index e6407e5..04a8877 100644
--- a/arch/arm/boot/dts/r8a77470.dtsi
+++ b/arch/arm/boot/dts/r8a77470.dtsi
@@ -20,6 +20,8 @@
i2c2 = &i2c2;
i2c3 = &i2c3;
i2c4 = &i2c4;
+ spi0 = &qspi0;
+ spi1 = &qspi1;
};

Geert can comment but I believe we are moving away from using aliases
in this way and that it would be best if the above hunk was dropped
from this patch.

https://patchwork.kernel.org/patch/10644159/

The rest of the patch looks fine to me.

Post by Fabrizio Castro
cpus {
@@ -460,6 +462,38 @@
status = "disabled";
};
+ compatible = "renesas,qspi-r8a77470", "renesas,qspi";
+ reg = <0 0xe6b10000 0 0x2c>;
+ interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 918>;
+ dmas = <&dmac0 0x17>, <&dmac0 0x18>,
+ <&dmac1 0x17>, <&dmac1 0x18>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
+ num-cs = <1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ resets = <&cpg 918>;
+ status = "disabled";
+ };
+
+ compatible = "renesas,qspi-r8a77470", "renesas,qspi";
+ reg = <0 0xee200000 0 0x2c>;
+ interrupts = <GIC_SPI 239 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cpg CPG_MOD 917>;
+ dmas = <&dmac0 0xd1>, <&dmac0 0xd2>,
+ <&dmac1 0xd1>, <&dmac1 0xd2>;
+ dma-names = "tx", "rx", "tx", "rx";
+ power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
+ num-cs = <1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ resets = <&cpg 917>;
+ status = "disabled";
+ };
+
compatible = "renesas,scif-r8a77470",
"renesas,rcar-gen2-scif", "renesas,scif";
--
2.7.4

Fabrizio Castro

2018-11-08 10:21:49 UTC

Permalink

Hello Simon,

Thank you for your feedback!

Sent: 02 November 2018 11:50
Subject: Re: [PATCH 3/4] ARM: dts: r8a77470: Add QSPI support

Geert can comment but I believe we are moving away from using aliases
in this way and that it would be best if the above hunk was dropped
from this patch.
https://patchwork.kernel.org/patch/10644159/

Geert, what do you want me to do here?

Thanks,
Fab

The rest of the patch looks fine to me.

Post by Fabrizio Castro
cpus {
@@ -460,6 +462,38 @@
status = "disabled";
};
+compatible = "renesas,qspi-r8a77470", "renesas,qspi";
+reg = <0 0xe6b10000 0 0x2c>;
+interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
+clocks = <&cpg CPG_MOD 918>;
+dmas = <&dmac0 0x17>, <&dmac0 0x18>,
+ <&dmac1 0x17>, <&dmac1 0x18>;
+dma-names = "tx", "rx", "tx", "rx";
+power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
+num-cs = <1>;
+#address-cells = <1>;
+#size-cells = <0>;
+resets = <&cpg 918>;
+status = "disabled";
+};
+
+compatible = "renesas,qspi-r8a77470", "renesas,qspi";
+reg = <0 0xee200000 0 0x2c>;
+interrupts = <GIC_SPI 239 IRQ_TYPE_LEVEL_HIGH>;
+clocks = <&cpg CPG_MOD 917>;
+dmas = <&dmac0 0xd1>, <&dmac0 0xd2>,
+ <&dmac1 0xd1>, <&dmac1 0xd2>;
+dma-names = "tx", "rx", "tx", "rx";
+power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
+num-cs = <1>;
+#address-cells = <1>;
+#size-cells = <0>;
+resets = <&cpg 917>;
+status = "disabled";
+};
+
compatible = "renesas,scif-r8a77470",
"renesas,rcar-gen2-scif", "renesas,scif";
--
2.7.4

Renesas Electronics Europe Ltd, Dukes Meadow, Millboard Road, Bourne End, Buckinghamshire, SL8 5FH, UK. Registered in England & Wales under Registered No. 04586709.

Geert Uytterhoeven

2018-11-08 10:24:54 UTC

Permalink

This post might be inappropriate. Click to display it.

Fabrizio Castro

2018-11-08 10:31:12 UTC

Permalink

Hello Geert,

Thank you for your feedback!

Subject: Re: [PATCH 3/4] ARM: dts: r8a77470: Add QSPI support
Hi Fabrizio,
On Thu, Nov 8, 2018 at 11:22 AM Fabrizio Castro

Post by Fabrizio Castro

Sent: 02 November 2018 11:50
Subject: Re: [PATCH 3/4] ARM: dts: r8a77470: Add QSPI support

Geert can comment but I believe we are moving away from using aliases
in this way and that it would be best if the above hunk was dropped
from this patch.
https://patchwork.kernel.org/patch/10644159/

Geert, what do you want me to do here?

Please drop the aliases. Thanks!

Will do, will send a new version without the additional aliases.
My understanding is that your personal preference is to only leave debug console and ethernet,
shall I also get rid of what was already upstreamed for RZ/G related boards that is not in line
with the new policy?

Thanks,
Fab

Gr{oetje,eeting}s,
Geert
--
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds

Renesas Electronics Europe Ltd, Dukes Meadow, Millboard Road, Bourne End, Buckinghamshire, SL8 5FH, UK. Registered in England & Wales under Registered No. 04586709.

Geert Uytterhoeven

2018-11-08 10:37:12 UTC

Permalink

This post might be inappropriate. Click to display it.

Fabrizio Castro

2018-11-08 10:48:48 UTC

Permalink

Hi Geert,

Thank you for your feedback!

Subject: Re: [PATCH 3/4] ARM: dts: r8a77470: Add QSPI support
Hi Fabrizio,
On Thu, Nov 8, 2018 at 11:31 AM Fabrizio Castro

Post by Fabrizio Castro

Post by Geert Uytterhoeven
On Thu, Nov 8, 2018 at 11:22 AM Fabrizio Castro

Post by Fabrizio Castro

Sent: 02 November 2018 11:50
Subject: Re: [PATCH 3/4] ARM: dts: r8a77470: Add QSPI support

Geert can comment but I believe we are moving away from using aliases
in this way and that it would be best if the above hunk was dropped
from this patch.
https://patchwork.kernel.org/patch/10644159/

Geert, what do you want me to do here?

Please drop the aliases. Thanks!

Will do, will send a new version without the additional aliases.

Thanks!

Post by Fabrizio Castro
My understanding is that your personal preference is to only leave debug console and ethernet,

Labeled serial ports and primary Ethernet, so U-Boot knows which MAC address
property to update.

Post by Fabrizio Castro
shall I also get rid of what was already upstreamed for RZ/G related boards that is not in line
with the new policy?

I believe these are all serial ports, using aliases that match the documented
and/or labeled port names? So they don't have to be removed.

We have also been using aliases for i2c, spi (like in this case), vin, etc., for all of the RZ/G boards,
shall I get rid of those?

Cheers,
Fab

Renesas Electronics Europe Ltd, Dukes Meadow, Millboard Road, Bourne End, Buckinghamshire, SL8 5FH, UK. Registered in England & Wales under Registered No. 04586709.

Mark Brown

2018-11-07 15:41:03 UTC

Permalink

The patch

spi: rspi: Add r8a77470 to the compatible list

has been applied to the spi tree at

https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git

All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to Linus during
the next merge window (or sooner if it is a bug fix), however if
problems are discovered then the patch may be dropped or reverted.

You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.

If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.

Please add any relevant lists and maintainers to the CCs when replying
to this mail.

Thanks,
Mark

From df80e0478972260bf285c5ed33f99b2424fba2af Mon Sep 17 00:00:00 2001
From: Fabrizio Castro <***@bp.renesas.com>
Date: Thu, 1 Nov 2018 12:35:02 +0000
Subject: [PATCH] spi: rspi: Add r8a77470 to the compatible list

Add r8a77470 to the list of examples with soctypes.
No driver change is needed as "renesas,qspi" will activate
the right code within the corresponding driver.

Signed-off-by: Fabrizio Castro <***@bp.renesas.com>
Signed-off-by: Mark Brown <***@kernel.org>
---
Documentation/devicetree/bindings/spi/spi-rspi.txt | 1 +
1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/spi/spi-rspi.txt b/Documentation/devicetree/bindings/spi/spi-rspi.txt
index fc97ad64fbf2..421722b93992 100644
--- a/Documentation/devicetree/bindings/spi/spi-rspi.txt
+++ b/Documentation/devicetree/bindings/spi/spi-rspi.txt
@@ -15,6 +15,7 @@ Required properties:
- "renesas,qspi-r8a7743" (RZ/G1M)
- "renesas,qspi-r8a7744" (RZ/G1N)
- "renesas,qspi-r8a7745" (RZ/G1E)
+ - "renesas,qspi-r8a77470" (RZ/G1C)
- "renesas,qspi-r8a7790" (R-Car H2)
- "renesas,qspi-r8a7791" (R-Car M2-W)
- "renesas,qspi-r8a7792" (R-Car V2H)

--
2.19.0.rc2

T***@microchip.com

2018-12-07 09:43:05 UTC

Permalink

Post by Fabrizio Castro
The is25lp016d is found on the iwg23s from iWave, therefore
add driver support for it so that we can upstream board support.
---
drivers/mtd/spi-nor/spi-nor.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c
index 9407ca5..85d869b 100644
--- a/drivers/mtd/spi-nor/spi-nor.c
+++ b/drivers/mtd/spi-nor/spi-nor.c
@@ -1352,6 +1352,8 @@ static const struct flash_info spi_nor_ids[] = {
{ "is25cd512", INFO(0x7f9d20, 0, 32 * 1024, 2, SECT_4K) },
{ "is25lq040b", INFO(0x9d4013, 0, 64 * 1024, 8,
SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
+ { "is25lp016d", INFO(0x9d6015, 0, 64 * 1024, 32,
+ SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
{ "is25lp080d", INFO(0x9d6014, 0, 64 * 1024, 16,
SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
{ "is25lp128", INFO(0x9d6018, 0, 64 * 1024, 256,