Discussion:
[PATCH v2] mtd: gpmi: add a new DT property to use the datasheet's minimum required ECC
Huang Shijie
2013-10-28 03:05:17 UTC
Permalink
In default way, we use the ecc_strength/ecc_step size calculated by ourselves
and use all the OOB area.

This patch adds a new property : "fsl,use-minimum-ecc"

If we enable it, we will firstly try to use the datasheet's minimum required
ECC provided by the MTD layer (the ecc_strength_ds/ecc_step_ds fields
in the nand_chip{}). So we may have free space in the OOB area by using the
minimum ECC, and we may support JFFS2 with some SLC NANDs, such as Micron's
SLC NAND.

If we fail to use the minimum ECC, we will use the legacy method to calculate
the ecc_strength and ecc_step size.

Signed-off-by: Huang Shijie <b32955 at freescale.com>
---
v1 --> v2:
based on David's patch to fix the regression.
---
.../devicetree/bindings/mtd/gpmi-nand.txt | 6 ++++++
drivers/mtd/nand/gpmi-nand/gpmi-nand.c | 3 +++
2 files changed, 9 insertions(+), 0 deletions(-)

diff --git a/Documentation/devicetree/bindings/mtd/gpmi-nand.txt b/Documentation/devicetree/bindings/mtd/gpmi-nand.txt
index 551b2a1..4297795 100644
--- a/Documentation/devicetree/bindings/mtd/gpmi-nand.txt
+++ b/Documentation/devicetree/bindings/mtd/gpmi-nand.txt
@@ -17,6 +17,12 @@ Required properties:
Optional properties:
- nand-on-flash-bbt: boolean to enable on flash bbt option if not
present false
+ - fsl,use-minimum-ecc: By enabling this boolean property, the gpmi will try
+ to use the datasheet's minimum required ECC provided by
+ the MTD layer (the ecc_strength_ds/ecc_step_ds fields
+ in the nand_chip{}). So we may have free space in the OOB
+ area by using the minimum ECC, and we may support JFFS2
+ with some SLC NANDs, such as Micron's SLC NAND.

The device tree may optionally contain sub-nodes describing partitions of the
address space. See partition.txt for more detail.
diff --git a/drivers/mtd/nand/gpmi-nand/gpmi-nand.c b/drivers/mtd/nand/gpmi-nand/gpmi-nand.c
index 7ac2280..3ec55d0 100644
--- a/drivers/mtd/nand/gpmi-nand/gpmi-nand.c
+++ b/drivers/mtd/nand/gpmi-nand/gpmi-nand.c
@@ -352,6 +352,9 @@ static int legacy_set_geometry(struct gpmi_nand_data *this)

int common_nfc_set_geometry(struct gpmi_nand_data *this)
{
+ if (of_property_read_bool(this->dev->of_node, "fsl,use-minimum-ecc")
+ && set_geometry_by_ecc_info(this))
+ return 0;
return legacy_set_geometry(this);
}
--
1.7.2.rc3
Huang Shijie
2013-11-05 06:19:49 UTC
Permalink
Post by Huang Shijie
In default way, we use the ecc_strength/ecc_step size calculated by ourselves
and use all the OOB area.
This patch adds a new property : "fsl,use-minimum-ecc"
If we enable it, we will firstly try to use the datasheet's minimum required
ECC provided by the MTD layer (the ecc_strength_ds/ecc_step_ds fields
in the nand_chip{}). So we may have free space in the OOB area by using the
minimum ECC, and we may support JFFS2 with some SLC NANDs, such as Micron's
SLC NAND.
If we fail to use the minimum ECC, we will use the legacy method to calculate
the ecc_strength and ecc_step size.
Signed-off-by: Huang Shijie <b32955 at freescale.com>
---
based on David's patch to fix the regression.
---
.../devicetree/bindings/mtd/gpmi-nand.txt | 6 ++++++
drivers/mtd/nand/gpmi-nand/gpmi-nand.c | 3 +++
2 files changed, 9 insertions(+), 0 deletions(-)
diff --git a/Documentation/devicetree/bindings/mtd/gpmi-nand.txt b/Documentation/devicetree/bindings/mtd/gpmi-nand.txt
index 551b2a1..4297795 100644
--- a/Documentation/devicetree/bindings/mtd/gpmi-nand.txt
+++ b/Documentation/devicetree/bindings/mtd/gpmi-nand.txt
- nand-on-flash-bbt: boolean to enable on flash bbt option if not
present false
+ - fsl,use-minimum-ecc: By enabling this boolean property, the gpmi will try
+ to use the datasheet's minimum required ECC provided by
+ the MTD layer (the ecc_strength_ds/ecc_step_ds fields
+ in the nand_chip{}). So we may have free space in the OOB
+ area by using the minimum ECC, and we may support JFFS2
+ with some SLC NANDs, such as Micron's SLC NAND.
The device tree may optionally contain sub-nodes describing partitions of the
address space. See partition.txt for more detail.
diff --git a/drivers/mtd/nand/gpmi-nand/gpmi-nand.c b/drivers/mtd/nand/gpmi-nand/gpmi-nand.c
index 7ac2280..3ec55d0 100644
--- a/drivers/mtd/nand/gpmi-nand/gpmi-nand.c
+++ b/drivers/mtd/nand/gpmi-nand/gpmi-nand.c
@@ -352,6 +352,9 @@ static int legacy_set_geometry(struct gpmi_nand_data *this)
int common_nfc_set_geometry(struct gpmi_nand_data *this)
{
+ if (of_property_read_bool(this->dev->of_node, "fsl,use-minimum-ecc")
+ && set_geometry_by_ecc_info(this))
+ return 0;
return legacy_set_geometry(this);
}
any comment about this patch?

thanks
Huang Shijie
Brian Norris
2013-11-05 20:07:29 UTC
Permalink
Post by Huang Shijie
In default way, we use the ecc_strength/ecc_step size calculated by ourselves
and use all the OOB area.
This patch adds a new property : "fsl,use-minimum-ecc"
If we enable it, we will firstly try to use the datasheet's minimum required
ECC provided by the MTD layer (the ecc_strength_ds/ecc_step_ds fields
in the nand_chip{}). So we may have free space in the OOB area by using the
minimum ECC, and we may support JFFS2 with some SLC NANDs, such as Micron's
SLC NAND.
If we fail to use the minimum ECC, we will use the legacy method to calculate
the ecc_strength and ecc_step size.
Signed-off-by: Huang Shijie <b32955 at freescale.com>
---
based on David's patch to fix the regression.
---
.../devicetree/bindings/mtd/gpmi-nand.txt | 6 ++++++
drivers/mtd/nand/gpmi-nand/gpmi-nand.c | 3 +++
2 files changed, 9 insertions(+), 0 deletions(-)
diff --git a/Documentation/devicetree/bindings/mtd/gpmi-nand.txt b/Documentation/devicetree/bindings/mtd/gpmi-nand.txt
index 551b2a1..4297795 100644
--- a/Documentation/devicetree/bindings/mtd/gpmi-nand.txt
+++ b/Documentation/devicetree/bindings/mtd/gpmi-nand.txt
- nand-on-flash-bbt: boolean to enable on flash bbt option if not
present false
+ - fsl,use-minimum-ecc: By enabling this boolean property, the gpmi will try
+ to use the datasheet's minimum required ECC provided by
+ the MTD layer (the ecc_strength_ds/ecc_step_ds fields
+ in the nand_chip{}). So we may have free space in the OOB
+ area by using the minimum ECC, and we may support JFFS2
+ with some SLC NANDs, such as Micron's SLC NAND.
This description still uses Linux-isms/MTD-isms (ecc_strength_ds,
ecc_step_ds, nand_chip{}, JFFS2). I would personally write this as
something like the following:

- fsl,use-minimum-ecc: Protect this NAND flash with the minimum ECC
strength required. The required ECC strength is
automatically discoverable for some flash
(e.g., according to the ONFI standard).
However, note that if this strength is not
discoverable, the software may choose an
implementation-defined ECC scheme.

Is that enough weaseling? Any comments from the DT folks, or shall we
simply take this binding without review?
Post by Huang Shijie
The device tree may optionally contain sub-nodes describing partitions of the
address space. See partition.txt for more detail.
...

Brian
Huang Shijie
2013-11-06 02:39:27 UTC
Permalink
Post by Brian Norris
This description still uses Linux-isms/MTD-isms (ecc_strength_ds,
ecc_step_ds, nand_chip{}, JFFS2). I would personally write this as
- fsl,use-minimum-ecc: Protect this NAND flash with the minimum ECC
strength required. The required ECC strength is
automatically discoverable for some flash
(e.g., according to the ONFI standard).
However, note that if this strength is not
discoverable, the software may choose an
implementation-defined ECC scheme.
this description is better then mine.

thanks
Huang Shijie
Tomasz Figa
2013-11-06 14:39:07 UTC
Permalink
Hi,
Post by Brian Norris
Post by Huang Shijie
In default way, we use the ecc_strength/ecc_step size calculated by ourselves
and use all the OOB area.
This patch adds a new property : "fsl,use-minimum-ecc"
If we enable it, we will firstly try to use the datasheet's minimum required
ECC provided by the MTD layer (the ecc_strength_ds/ecc_step_ds fields
in the nand_chip{}). So we may have free space in the OOB area by using the
minimum ECC, and we may support JFFS2 with some SLC NANDs, such as Micron's
SLC NAND.
If we fail to use the minimum ECC, we will use the legacy method to calculate
the ecc_strength and ecc_step size.
Signed-off-by: Huang Shijie <b32955 at freescale.com>
---
based on David's patch to fix the regression.
---
.../devicetree/bindings/mtd/gpmi-nand.txt | 6 ++++++
drivers/mtd/nand/gpmi-nand/gpmi-nand.c | 3 +++
2 files changed, 9 insertions(+), 0 deletions(-)
diff --git a/Documentation/devicetree/bindings/mtd/gpmi-nand.txt b/Documentation/devicetree/bindings/mtd/gpmi-nand.txt
index 551b2a1..4297795 100644
--- a/Documentation/devicetree/bindings/mtd/gpmi-nand.txt
+++ b/Documentation/devicetree/bindings/mtd/gpmi-nand.txt
- nand-on-flash-bbt: boolean to enable on flash bbt option if not
present false
+ - fsl,use-minimum-ecc: By enabling this boolean property, the gpmi will try
+ to use the datasheet's minimum required ECC provided by
+ the MTD layer (the ecc_strength_ds/ecc_step_ds fields
+ in the nand_chip{}). So we may have free space in the OOB
+ area by using the minimum ECC, and we may support JFFS2
+ with some SLC NANDs, such as Micron's SLC NAND.
This description still uses Linux-isms/MTD-isms (ecc_strength_ds,
ecc_step_ds, nand_chip{}, JFFS2). I would personally write this as
- fsl,use-minimum-ecc: Protect this NAND flash with the minimum ECC
strength required. The required ECC strength is
automatically discoverable for some flash
(e.g., according to the ONFI standard).
However, note that if this strength is not
discoverable, the software may choose an
implementation-defined ECC scheme.
After reading this description, it is not clear to me what is the default
behavior if this property is not present.

Best regards,
Tomasz

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